北京航空航天大学主页平台系统张德明--中文主页--论文

扫描手机二维码

欢迎您的访问
您是第位访客

开通时间：..

最后更新时间：..

登录| English | 手机版

同专业博导

同专业硕导

张德明 ( 副教授 ) 赞
的个人主页 http://shi.buaa.edu.cn/zhangdeming/zh_CN/index.htm
副教授博士生导师硕士生导师
主要任职：副教授
其他任职：北航青岛研究院院长

论文当前位置：中文主页 >> 论文

[11] Lang Zeng#,Deming Zhang#,Tianqi Gao,Fanghui Gong,Xiaowan Qin,Mingzhi Long,Youguang Zhang.Performance Evaluation and Optimization of Single Layer MoS2 Double Gate Transistors With Schottky Barrier Contacts.[期刊]:IEEE Transactions on Electron Devices,2017,64(7):2999-3006
[12] Tianqi Gao,Deming Zhang,Youguang Zhang,Kang L. Wang.Compact Model for Negative Capacitance Enhanced Spintronics Devices.[期刊]:IEEE Transactions on Electron Devices,2019,66(6):2795-2801
[13] .Self-Adaptive Write Circuit for Magnetic Tunneling Junction Memory With Voltage-Controlled Magnetic Anisotropy Effect.[期刊]:IEEE Transactions on Nanotechnology,2018,17(3):492-499
[14] .Negative Capacitance Enhanced All Spin Logic Devices With an Ultra-Low 1 mV Working Voltage.[期刊]:IEEE Journal of the Electron Devices Society,2018,6:245-249
[15] .Heterogeneous memristive devices enabled by magnetic tunnel junction nanopillars surrounded by resistive silicon switches.[期刊]:Advanced Electronic Materials,2018,4(3):1700461
[16] .Novel Magnetic Tunneling Junction Memory Cell With Negative Capacitance-Amplified Voltage-Controlled Magnetic Anisotropy Effect.[期刊]:IEEE Transactions on Electron Devices,2017,64(12):4919-4927
[17] .Voltage-Gated Spin-Hall Effect based Magnetic Non-volatile Flip-Flop for High Speed, Low Power and Compact Cell Area.[会议录]:2020 IEEE International Symposium on Circuits and Systems (ISCAS 2020),2020
[18] .Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit Torque.[会议录]:2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2019),2019
[19] .A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation.[会议录]:2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2018),2018
[20] .Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices.[会议录]:2018 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2018),2018

共32条 2/4

首页上页下页尾页页

张德明的教师个人主页版权所有：北京航空航天大学