Liang Wang (王良)

(PhD, CUHK 2017;  BEng, HIT, 2011)

Assistant Professor,

School of Computer Science and Engineering, Beihang University

Office: Rm 1034, New Main Building, Beihang University, Haidian Distict, Beijing, China

Email:  lwang20@buaa.edu.cn

Tel: +86 15501171025

Liang Wang is currently an assistant professor with the School of Computer Science and Engineering, Beihang University, China.

He received the BEng and MSc degree in electronics engineering, Harbin Institute of Technology in 2011 and 2013 respectively, and the Ph.D degree in Computer Science and Engineering, The Chinese University of Hong Kong in 2017. He was supervised by Prof. Ho-fung Leung and Prof. Terrence mak. He was a postdoctoral research fellow in Institute of Microelectronics, Tsinghua University during 2017 and 2020, in collabration with Prof. Leibo Liu. 

His research interests include computer architecture, network-on-chip, deep learning accelerator, GPU computing, etc.

He has published tens of papers in top journals and conferences, including IEEE TPDS, IEEE TC, IEEE TCAD,  DAC, ESWEEK、GLSVLSI, VLSI-SoC, etc. He was also awarded the Best Paper Award in the VLSI-SoC'14. 

Selected publications:

[1] Yibo Wu, Liang Wang, Xiaohang Wang, Jie Han, Jianfeng Zhu, Honglan Jiang, Shouyi Yin, Shaojun Wei, Leibo Liu. Upward Packet Popup for Deadlock Freedom in Modular Chiplet-Based Systems. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022 （accepted）

[2] Liang Wang, Leibo Liu, Xiaohang Wang, Jie Han, Chenchen Deng, Shaojun Wei. CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology. Proceedings of the 57th Annual Design Automation Conference (DAC). 2020 :1-6

[3] Liang Wang, Leibo Liu, Jie Han, Xiaohang Wang, Shouyi Yin, Shaojun Wei. Achieving Flexible Global Reconfiguration in NoCs using Reconfigurable Rings. IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 31, no. 3, pp. 611-622, March 2020

[4] Yibo Wu; Liang Wang; Xiaohang Wang; Jie Han; Shouyi Yin; Shaojun Wei; Leibo Liu. A Deflection-Based Deadlock Recovery Framework to Achieve High Throughput for Faulty NoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 10, pp. 2170-2183, October 2021

[5] Yibo Wu; Leibo Liu; Liang Wang; Xiaohang Wang; Jie Han; Chenchen Deng; Shaojun Wei. Aggressive Fine-Grained Power Gating of NoC Buffers. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). vol. 39, no. 11, pp. 3177 - 3189, October 2020

[6] Liang Wang, Ping Lv, Leibo Liu, Jie Han, Ho-fung Leung, Xiaohang Wang, Shouyi Yin, Shaojun Wei, Terrence Mak. A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 9, pp. 1771-1784, Sept. 2019

[7] Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence Mak. A Non-Minimal Routing Algorithm for Aging Mitigation in 2D-Mesh NoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 7, pp. 1373-1377, July 2019

[8] Liang Wang, Xiaohang Wang, Terrence Mak. Adaptive Routing Algorithms for Lifetime Reliability Optimization in Network-on-Chip. IEEE Transactions on Computers (TC), vol. 65, no. 9, pp. 2896-2902, Sept. 2016.

[9] Liang Wang, Xiaohang Wang, Terrence Mak. Dynamic Programming-Based Lifetime Aware Adaptive Routing Algorithm for Network-on-Chip. 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2014