张悦
Gender:Male
Education Level:博士研究生
Alma Mater:Univ. Paris Sud
Profile
MORE+Yue Zhang Ph.D.
Deputy Dean, Professor
School of Integrated Circuit Science and Engineering
Beihang University, Beijing, China
Email: yz@buaa.edu.cn
Yue Zhang is currently full professor and deputy dean of School of Integrated Circuit Science and Engineering, Beihang University, China. He is also executive deputy director of Nanoelectronics Science and Technology Center, Hefei Innovation Research Institute, Beihang University, China.
He received B.S. in optoelectronics from Huazhong University of Science and Technology, Wuhan, China, in 2009, M.S. and Ph.D. in microelectronics from University of Paris-Sud, France, in 2011 and 2014, respectively. He was a postdoctoral researcher in CNRS (Centre National de la Recherche Scientifique), France.
His current research focuses on spintronics, emerging non-volatile memory technologies and hybrid low-power circuit designs. He has authored more than 100 scientific papers, including Nature Communications, Applied Physics Reviews, Advanced Science, IEEE Electron Device Letters, Advanced Electronic Materials, IEEE transactions on Circuits and Systems-I: Regular Papers, etc.
Yue Zhang is the recipient of the National Science Fund for Excellent Young Scholars in 2021, the Young Elite Scientist Sponsorship Program of CAST in 2017, the 2017 IEEE CAS Society’s Guillemin-Cauer Award for the best paper published in the IEEE transactions on Circuits and Systems-I: Regular Papers, the NANOARCH’19 Best Paper Award, the NEWCAS’13 Best Paper Award, the ESREF’14 Best Poster Award. He also served as reviewers for various international journals/conferences, such as Nature Communications, Applied Physics Letters, Scientific Reports, IEEE TCAS, TED, IEEE TNANO, TVLSI, GLSVLSI, ICTA, etc.
IEEE Senior Member
Associate Editor: IEEE Transactions on Circuits and Systems I: Regular Papers
Associate Editor: IEEE Access
General Chair: 2019 ACM/IEEE NANOARCH
Local Chair: 2021 IEEE NVMSA
Track Chair: 2020 ACM GLSVLSI
Selected Publications:
1. Z. Zhang, K. Lin, Y. Zhang*, et al. “Magnon scattering modulated by omnidirectional hopfion motion in antiferromagnets for meta-learning”, Science Advances, vol.9, eade7439, 2023. (Featured Image Article) (https://www.science.org/doi/10.1126/sciadv.ade7439)
2. Z. Zheng#, Y. Zhang#*, et al.“Field-free spin-orbit torque-induced switching of perpendicular magnetization in a ferrimagnetic layer with a vertical composition gradient”, Nature Communications, vol.12, 4555, 2021. (https://www.nature.com/articles/s41467-021-24854-7)
3. Y. Zhang*, et al.“Ferrimagnets for spintronic devices: From materials to applications”, Applied Physics Reviews, vol. 10, 011301, 2023. (Featured Article) (https://aip.scitation.org/doi/10.1063/5.0104618)
4. K. Zhang, L. Chen, Y. Zhang*, et al.“Efficient and controllable magnetization switching induced by intermixing-enhanced bulk spin–orbit torque in ferromagnetic multilayers”, Applied Physics Reviews, vol. 9, 011407, 2022. (Featured Article) (https://aip.scitation.org/doi/10.1063/5.0067348)
5. Z. Zheng, Z. Zhang, X. Feng, K. Zhang, Y. Zhang*, et al.“Anomalous Thermal-Assisted Spin–Orbit Torque-Induced Magnetization Switching for Energy-Efficient Logic-in-Memory”, ACS NANO, 2022. (https://doi.org/10.1021/acsnano.2c02031)
6. Z. Zheng, Y. Zhang*, et al.“Perpendicular magnetization switching by large spin-orbit torques from sputtered Bi2Te3”, Chinese Physics B, vol. 29, 7, 078505, 2020. (Cover) (http://cpb.iphy.ac.cn/EN/10.1088/1674-1056/ab9439)
7. K. Zhang, X. Jia, K. Cao, J. Wang, Y. Zhang*, et al. “High On/Off Ratio Spintronic Multi-Level Memory Unit for Deep Neural Network”, Advanced Science, 2103357, 2022. (Cover)(https://onlinelibrary.wiley.com/doi/10.1002/advs.202103357)
8. K. Zhang, K. Cao, Y. Zhang*, et al.“Rectified Tunnel Magnetoresistance Device With High On/Off Ratio for In-Memory Computing”, IEEE Electron Device Letters, vol. 41, 6, pp. 928-931, 2020. (Cover)(https://ieeexplore.ieee.org/document/9064521)
9. Z. Zhang, Y. Zhu, Y. Zhang*, et al.“Skyrmion-Based Ultra-Low Power Electric-Field-Controlled Reconfigurable (SUPER) Logic Gate”, IEEE Electron Device Letters, vol. 40, 12, pp. 1984-1987, 2019. (Cover)(https://ieeexplore.ieee.org/document/8864055)
10. Z. Zhang, Z. Zheng, Y. Zhang*, et al.“3D Ferrimagnetic Device for Multi-Bit Storage and Efficient In-Memory Computing”, IEEE Electron Device Letters, vol. 42, 2, pp. 152-155, 2021. (https://ieeexplore.ieee.org/document/9309002)
11. G. Wang, Y. Zhang*, et al.“Ultrafast and Energy-Efficient Ferrimagnetic XNOR Logic Gates for Binary Neural Networks”, IEEE Electron Device Letters, vol. 42, 4, pp. 621-624, 2021. (https://ieeexplore.ieee.org/document/9363935)
12. K. Zhang, Y. Zhang*, et al.“Large Magnetoresistance and 15 Boolean Logic Functions Based on a ZnCoO Film and Diode Combined Device”, Advanced Electronic Materials, vol. 5, 3, 1800812, 2019. (Cover) (https://onlinelibrary.wiley.com/doi/10.1002/aelm.201800812)
13. Y. Zhang*, et al.“Time-Domain Computing in Memory Using Spintronics for Energy-Efficient Convolutional Neural Network”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, 3, 1193-1205, 2021. (https://ieeexplore.ieee.org/document/9345759)
14. J. Wang, Y. Zhang*, et al.“A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, 12, 4247-4258, 2020. (https://ieeexplore.ieee.org/document/9190048)
15. G. Wang, Y. Zhang*, et al.“Ultra-Dense Ring-Shaped Racetrack Memory Cache Design”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, 1, 215-225, 2019. (https://ieeexplore.ieee.org/document/8458153)
[1] 2011.10 to 2014.7
法国南巴黎大学
| Doctoral degree
| With Certificate of Graduation for Doctorate Study
[2] 2009.9 to 2011.8
法国南巴黎大学
| Master's degree
| With Certificate of Graduation for Study as Master's Candidates
[3] 2005.9 to 2009.8
华中科技大学
| Bachelor's degree
| University graduated
No content